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MCP2030
5.15
Configurable Output Enable Filter
The purpose of this filter is to enable the LFDATA out-
put and wake the external microcontroller only after
receiving a specific sequence of pulses on the LC input
pins. Therefore, it prevents waking up the external
microcontroller due to noise or unwanted input signals.
The circuit compares the timing of the demodulated
header waveform with a pre-defined value, and
enables the demodulated LFDATA output when a
match occurs.
The output enable filter consists of a high (T OEH ) and
low duration (T OEL ) of a pulse immediately after the
AGC settling gap time. The selection of high and low
times further implies a max period time. The output
enable high and low times are determined by SPI
programming. Figure 5-3 and Figure 5-4 show the
output enable filter waveforms.
There should be no missing cycles during T OEH .
Missing cycles may result in failing the output enable
condition.
T STAB
(T AGC + T PAGC )
Required Output Enable Sequence
Start bit
Data Packet
Demodulator
Output
T GAP
t ≥ T OEH
t ≥ T OEL
Device Wake-up
AGC
and AGC Stabilization
Gap Pulse
t ≤ T OET
LFDATA output is enabled
on this rising edge
FIGURE 5-3:
DS21981A-page 36
Output Enable Filter Timing.
? 2005 Microchip Technology Inc.
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